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If the presenter has given approval, presentations will be posted on this page (BELOW). We will possibly add more presentation until November 20th. Recheck later if you don't see the presentation you want.
Location : AMD(2485 Augustine Dr, Santa Clara, CA 95054)
10:00 - 10:40 Keynote Address
Allen Rush (AMD)
(Senior Fellow and Chief Architect for imaging, Machine Learning, and Computer Vision)
1:00 LUNCH - Free lunch
3:20 B R E A K
Title - Trends in Internal Sensors for Test
4:00 - 4:40 - Presentation 7 - Gevorg Torjyan (Marvell)
Title - DFT related RTL Enhancements 4:40 - 5:20 - Panel Discussion Referee: Jim Johnson
5:30 - 6:30 Happy Hour at TBD
Location : AMD (2485 Augustine Dr, Santa Clara, CA 95054)
Mixed Signal DFT :Trends, Principles, and Solutions
Teachers - Stephen Sunter
(Mentor, a Siemens Business)
Abstract: The tutorial will review trends in ad hoc analog DFT and fault simulation, then briefly consider the systematic DFT of IEEE 1149.1/4/6/7/8/10, and 1687. Next, it will describe essential principles of practical analog DFT (including BIST), such as addition, subtraction, and spec-based defect-oriented test, and how they are used in robust DFT techniques ranging from efficient analog defect simulation to over/under sampling methods that greatly improve range, resolution, and reusability. Well conclude with an overview of emerging standards IEEE P2427 and P1687.2 that facilitate these techniques for Analog Defect Coverage and Analog Test Access, respectively, and how they apply to the measurement of ISO 26262 metrics for automotive ICs.
9:30 - 10:00am On site Registration (coffee provided)
3pm - Class ends